Low-loss co-packaged photonics products integrate photonic and electronic circuits to achieve high-bandwidth, energy-efficient, and low-latency data transmission for AI and HPC applications.

Overview of Co-Packaged Photonics (CPO)

Co-packaged photonics (CPO) technology combines photonic integrated circuits (PICs) with electronic integrated circuits (EICs) within the same package or in close proximity. This integration reduces electrical interconnect losses, lowers power consumption, and increases bandwidth compared to traditional electrical I/O solutions . Silicon photonics is a key enabler, allowing optical components to be fabricated on silicon wafers using CMOS-compatible processes .

Key Original Products and Technologies

1. Intel Optical Compute Interconnect (OCI) Chiplet Intel has demonstrated the first fully integrated optical I/O chiplet co-packaged with a CPU, supporting 64 channels at 32 Gbps per direction over fiber distances up to 100 meters . This product is designed for AI infrastructure and high-performance computing, offering low-loss optical interconnects, reduced power consumption, and scalable CPU/GPU cluster connectivity.
2. SHINKO Optical Chiplet and i-THOP Package SHINKO ELECTRIC INDUSTRIES develops optical chiplets that integrate PICs and EICs for high-density packaging. Their i-THOP (integrated Thin film High-density Organic Package) enables low-loss optical wiring and optoelectronic convergence, supporting compact and efficient co-packaged photonics assemblies .
3. Micro Ring Resonators (MRRs) and Phase-Change Material (PCM) Photonics Advanced CPO products use MRRs for high-density integration and non-volatile neuromorphic photonics with PCMs to reduce static power consumption and thermal crosstalk. These solutions combine photonic memory and optoelectronic interconnects to achieve low-loss, high-bandwidth, and energy-efficient performance .

Integration Methods

• Heterogeneous Integration: Combines dissimilar chiplets (PICs and EICs) side-by-side or stacked, often using high-performance substrates to minimize electrical losses .
• Hybrid Bonding: Directly bonds photonic and electronic chips to reduce interconnect length and signal loss .
• Through-Silicon Via (TSV) and Through-Glass Via (TGV) Packaging: Provides vertical electrical and optical connections for compact, low-loss integration .

Applications

Low-loss co-packaged photonics products are primarily used in:

• Data centers and AI clusters for high-bandwidth, low-latency interconnects.
• High-performance computing (HPC) systems requiring scalable CPU/GPU connectivity.
• Next-generation networking including 6G and optical switching infrastructure. These products are critical for reducing power consumption, increasing reach, and supporting emerging AI workloads that demand high-speed optical interconnects .

Conclusion

Original low-loss co-packaged photonics products, such as Intel's OCI chiplet and SHINKO's optical chiplets with i-THOP packaging, leverage silicon photonics, heterogeneous integration, and advanced packaging techniques to deliver high-bandwidth, energy-efficient, and low-latency optical interconnects. These solutions are essential for modern AI, HPC, and data center applications, providing a scalable path toward next-generation computing infrastructure.